In a signal processor of a measurement apparatus or sample analyzer such as a GC/MS, the analog output signal from the detector is converted to digital data by an A/D converter, and the data is stored once in a memory. The data is then read out from the memory, and various calculations are performed with the data to analyze the sample from various aspects.
In order to analyze the sample precisely, it is necessary to obtain data having a large dynamic range. Since the dynamic range of the data obtained by such a method as described above is limited by the dynamic range of the A/D converter, following measures are taken to expand the dynamic range of the data obtained.
FIG. 5 shows a data sampling section of a conventional signal processor. An analog output signal from a detector of a sample analyzer (not shown) is introduced into two paths. On one path are provided a first pre-amplifier 10, a first sample holding (S/H) circuit 11 and a first analog switch 12, and on the other path are provided a second pre-amplifier 13, a second sample holding (S/H) circuit 14 and a second analog switch 15. The first pre-amplifier 10 has an amplifying gain of unity, and the second pre-amplifier has an amplifying gain of sixty-four (64). The signals passing through the two paths join to enter a third sample holding (S/H) circuit 16, where the joined analog signal is held, and the held signal is converted to digital data by an A/D converter 17. The digital data is given to a microcomputer (.mu.COM) 20 and stored in a memory (not shown). The first, second and third S/H circuits 11, 14, 16, the first and second analog switches 12, 15 and the A/D converter 17 receive clock pulse signals from a clock pulse generator 19 which is controlled by a timing control signal SP from the microcomputer 20. The output of the second S/H circuit 14 is also given to a comparator 18, where the output is compared with a preset reference signal and the comparison result is given to the clock pulse generator 19.
The operation of the data sampling section of FIG. 5 is as follows. The output signal of the detector is amplified by the first pre-amplifier 10 and the second pre-amplifier 13 respectively, and is held by the first S/H circuit 11 and the second S/H circuit 14 at the same time. The output of the second S/H circuit 14 is compared with the preset reference signal at the comparator 18, whereby a high level signal is sent to the clock pulse generator 19 when the output of the second S/H circuit 14 is higher than the preset reference signal. The reference signal is preset beforehand considering the maximum input level of the A/D converter 17. When the output signal of the comparator 18 is of a low level, the first analog switch 12 is opened and second analog switch 15 is closed to select the output of the second S/H circuit 14. When the output signal of the comparator 18 is of a high level, on the other hand, the first analog switch 12 is closed and the second analog switch 15 is opened to select the output of the first S/H circuit 11. That is, the signal passing through the second pre-amplifier 13 and amplified by the gain of sixty-four is selected when such high-gain amplified signal does not exceed the maximum input level of the A/D converter 17, and the signal passing through the first pre-amplifier 10 with the gain of unity is selected when the high-gain amplified signal may exceed the maximum input level of the A/D converter 17.
The selected signal is held again by the third S/H circuit 16, and the held signal is converted to digital data by the A/D converter 17. While the previously held signal is being A/D converted, the next sample holding is done at the next sampling point on the analog output signal of the detector by the first S/H circuit 11 and the second S/H circuit 14. From the clock pulse generator 19 to the microcomputer 20 is sent a gain signal GS representing which of the gain, unity or factor of sixty-four, is used before the signal is held by the third S/H circuit 16. When the gain signal GS tells that the analog signal is amplified by unity, the microcomputer 20 multiplies the converted data by sixty-four before storing it in the memory, and when the gain signal GS tells that the analog signal is amplified by a factor of sixty-four, the converted data is stored in the memory as it is.
In summary, when the analog output signal from the detector is small, it is amplified with a larger gain, and when the analog output signal from the detector is large, it is amplified with a smaller gain so that input to the A/D converter is adequately adjusted within its allowable range. Thus an analog output signal from the detector having a dynamic range larger than that of the A/D converter can be sampled and A/D converted.
The sampling section of the conventional signal processor described above is rather complicated and requires many constituents, so that it tends to be expensive. Another drawback is that it is vulnerable to external noises and is difficult to perform high-precision analysis because the analog signal passes two S/H circuits and the signal path is long. This necessitates a noise shield to the signal line, which also increases the cost.